Marly Roncken

Biography

Marly Roncken

Marly Roncken is co-founder and Director of the Asynchronous Research Center at Portland State University, and Research Professor in the Computer Science Department of the Maseeh College of Engineering and Computer Science. She has worked on self-timed systems for more than 25 years.

She took her M.Sc. in Mathematics and Computer Science from the University of Utrecht in 1985, after two years of full-time research in semantics and proof systems for parallel programming languages and distributed systems with Willem-Paul de Roever. Her M.Sc. thesis was in two parts, a specimen database for the Department of Systematic Botany and a proof system for Brinch Hansen's distributed processes.

She joined Philips Research Laboratories in Eindhoven in 1985, working first on specification and verification of distributed systems and then, after in-house VLSI training, on asynchronous circuit design and test within the Tangram project. She moved to Intel's Strategic CAD Labs in Portland in 1997, drawn by the Rappid project, and remained at Intel until 2009, including three years as Intel's Researcher in Residence at UC Berkeley for the GigaScale Systems Research Center.

She co-founded the Asynchronous Research Center with Ivan Sutherland in 2009. Sutherland is her research partner and her husband; they married in 2006. She describes the division of labor between them as a mathematician focused on logic, structure, and correctness working alongside an electrical engineer who designs circuits and systems.

She holds US Patent 5,590,275, issued December 31, 1996, assigned to Philips, with Kees van Berkel and Ronald Saeijs. She has published over 40 papers, with best paper awards at ASYNC in 1994 and 1999 and a best paper finalist in 2015. She received the Sigma Xi Columbia Willamette Chapter Outstanding Researcher Award for 2018 in Engineering and Computer Sciences.

Projects

Asynchronous Research Center

Founded 2009 at Portland State, reporting to the Dean's office of the Maseeh College, with faculty appointments in the Computer Science and Electrical and Computer Engineering departments. The stated goal is to study and teach asynchronous and globally asynchronous locally synchronous design principles and make them accessible to students, sponsors, and anyone designing distributed systems without a clock.

The underlying position, which Sutherland set out in his 2012 Communications of the ACM viewpoint "The Tyranny of the Clock," is that the global clock in a digital system forces every component to accommodate the slowest one. Roncken and Sutherland use the analogy of a 55-minute class period, useful for scheduling and rarely questioned as to whether it suits learning, being either too short or too long for any given task.

The Link-Joint model

Roncken developed this around 2015. The model separates communication and storage, performed in Links, from computation and flow control, performed in Joints. Links and Joints communicate through a generic protocol shared across asynchronous circuit families, so that the handshaking differences between Micropipeline, GasP, Mousetrap, and Click remain internal to the Links and the Joints become interchangeable.

Each Joint action carries an individual go signal that can be enabled or disabled from outside. The circuit that provides this is called MrGO, and it makes it possible to exit an initial state cleanly, stop a running circuit in a delay-insensitive manner, single-step or multi-step operations for test and debug, and test subsystems at speed.

Roncken and Sutherland have proposed the Link-Joint model as a replacement for Register Transfer Level as the hardware-software interface, on the argument that future computation will be distributed over space and time and will be self-timed in nature.

The Weaver

A self-timed non-blocking 8 by 8 crossbar switch designed using the Link-Joint model. Measured results from a working chip in 40 nm CMOS reached speeds of 6 giga data items per second, which at 72 bits per data item amounts to 3.5 terabits per second across the full crossbar.

Rappid

The Revolving Asynchronous Pentium Processor Instruction Decoder, an asynchronous implementation of the Intel Architecture instruction length decoder, fabricated on a 0.25 micron CMOS process and tested successfully. Roncken's testability analysis showed that the asynchronous pulse-domino circuits in Rappid had stuck-at testability comparable to the clocked pulse-domino circuits in the Pentium Pro. The prototype achieved 2.5 to 4.5 instructions per nanosecond, three times the throughput and half the latency of a comparable 400 MHz clocked circuit, at half the power and about the same area.

Tangram and the DCC error corrector

At Philips, Roncken developed test and design-for-test strategies for asynchronous VLSI within the Tangram project, which became the Philips incubator Handshake Solutions in 2004. Her partial scan method for the DCC player error corrector, a 155,000-transistor chipset, achieved 99.9 percent stuck-at output fault coverage in a 64 millisecond test at a cost of under 3 percent additional area. The fully asynchronous DCC error corrector consumed 10 mW at 5 V, one fifth of its synchronous counterpart.

Superconducting circuits

Work funded by Mayo Clinic Grant SPPDG-052 from 2020 to 2024 applies the Link-Joint model to superconducting circuit fabrics. This includes an RSFQ variant of MrGO and a JTAG test-access-port controller for RSFQ logic, implemented in 580 by 280 micrometers, less area than two bonding pads.

Conference involvement

Technical Program Chair for ASYNC in 2002, 2014, and 2019, General Program Chair in 2007, and Technical Program Chair for Memocode 2013 in Portland. She has also served as ASYNC Best Paper Award Chair, Industrial Chair, and on the Technical Program Committee and Steering Committee.

Selected publications

• Roncken, Marly, Swetha Mettala Gilla, Hoon Park, Navaneeth Jamadagni, Chris Cowan, and Ivan Sutherland. "Naturalized Communication and Testing." ASYNC 2015, 77-84. Best paper finalist.
• Roncken, Marly, Ivan Sutherland, et al. "How to Think about Self-Timed Systems." IEEE Asilomar Conference on Signals, Systems, and Computers, 2017, 1597-1604.
• Roncken, Marly, and Ivan Sutherland. "Design and Test of High-Speed Asynchronous Circuits." Chapter 7 in J. Di and S. Smith, eds., Asynchronous Circuit Applications. IET, 2020, 113-171.
• Roncken, Marly. "Defect-Oriented Testability for Asynchronous ICs." Proceedings of the IEEE 87, no. 2 (1999): 363-375. Invited paper.
• Roncken, Marly. "Partial Scan Test for Asynchronous Circuits Illustrated on a DCC Error Corrector." ASYNC 1994, 247-256. Best paper award.
• Roncken, Marly, and Rob Gerth. "A Denotational Semantics for Synchronous and Asynchronous Behaviour with Multiform Time." BCS-FACS Workshop on Semantics for Concurrency, 1990, 21-38.

Further Reading

• Ivan Sutherland
• The Idea Factory: Learning to Think at MIT
• The Allure of Machinic Life: Cybernetics, Artificial Life, and the New AI
• The Human Use Of Human Beings: Cybernetics And Society
• A Geography of Time: The Temporal Misadventures of a Social Psychologist, or How Every Culture Keeps Time Just a Little Bit Differently
• The Culture of Time and Space, 1880-1918
• The Railway Journey: The Industrialization of Time and Space in the 19th Century
• Computing in the Middle Ages
• Where Wizards Stay Up Late: The Origins Of The Internet

External Links

• Asynchronous Research Center, Portland State University
• Curriculum Vitae
• ARC Publications